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Searched refs:QCA953X_RESET_DDR (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h713 #define QCA953X_RESET_DDR BIT(16) macro
/openbmc/linux/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h654 #define QCA953X_RESET_DDR BIT(16) macro