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Searched refs:Pipeline (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/media/platform/nxp/
H A DKconfig47 tristate "NXP i.MX Pixel Pipeline (PXP)"
53 The i.MX Pixel Pipeline is a memory-to-memory engine for scaling,
/openbmc/openbmc/poky/bitbake/lib/bb/pysh/
H A Dpyshyacc.py55 class Pipeline: class
174 p[0] = ('pipeline', Pipeline(p[2][1:], True))
176 p[0] = ('pipeline', Pipeline(p[1][1:]))
710 elif isinstance(v, Pipeline):
782 elif isinstance(cmds, (Pipeline, SimpleCommand)):
/openbmc/linux/Documentation/gpu/
H A Ddrm-kms.rst22 :alt: KMS Display Pipeline
23 :caption: KMS Display Pipeline Overview
90 :alt: KMS Output Pipeline
91 :caption: KMS Output Pipeline
93 digraph "Output Pipeline" {
102 label="Internal Pipeline"
H A Dkomeda-kms.rst76 Possible D71 Pipeline usage
305 a similar architecture: Pipeline/Component to describe the HW features and
321 Pipeline and component are used to describe how to handle the pixel data. We
/openbmc/linux/Documentation/devicetree/bindings/media/xilinx/
H A Dxlnx,video.txt1 Xilinx Video IP Pipeline (VIPP)
/openbmc/linux/drivers/gpu/drm/sti/
H A DNOTES10 Pipeline (GDP).
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dmetafmt-intel-ipu3.rst43 Pipeline parameters
H A Ddev-subdev.rst222 .. flat-table:: Sample Pipeline Configuration
/openbmc/linux/Documentation/gpu/amdgpu/
H A Damdgpu-glossary.rst31 End Of Pipe/Pipeline
/openbmc/linux/arch/alpha/lib/
H A Dev6-copy_user.S46 # Pipeline info: Slotting & Comments
H A Dev6-clear_user.S50 # Pipeline info : Slotting & Comments
/openbmc/linux/Documentation/admin-guide/media/
H A Dplatform-cardlist.rst33 imx-pxp i.MX Pixel Pipeline (PXP)
H A Dipu3.rst449 :alt: IPU3 ImgU Pipeline
450 :caption: IPU3 ImgU Pipeline Diagram
/openbmc/linux/Documentation/arch/sparc/oradax/
H A Ddax-hv-api.txt142 [27] When API version 2.0 is negotiated, this is the Pipeline Flag [512]. It is reserved in
216 The Pipeline flag is an optimization that directs the output of one CCB (the "source" CCB) directly…
218 memory. The Pipeline flag is advisory and may be dropped.
220 Both the Pipeline and Serial bits must be set in the source CCB. The Conditional bit must be set in…
223 with both the Pipeline and Serial bits set, proceed through CCBs with the Pipeline, Serial, and Con…
224 bits set, and terminate at a CCB that has the Conditional bit set, but not the Pipeline bit.
509 Pipeline target (API 2.0)
/openbmc/linux/Documentation/gpu/amdgpu/display/
H A Dmpo-overview.rst52 "AMD Hardware Pipeline"). Typically most AMD devices operate in a pipe-split
H A Ddcn-overview.rst127 AMD Hardware Pipeline