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Searched refs:PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_MODE_MASK (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/smuio/
H A Dsmuio_13_0_3_sh_mask.h87 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_MODE_MASK … macro
H A Dsmuio_11_0_0_sh_mask.h1067 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_MODE_MASK … macro
H A Dsmuio_13_0_2_sh_mask.h1116 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_MODE_MASK … macro
H A Dsmuio_13_0_6_sh_mask.h82 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_MODE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_7_1_3_sh_mask.h5657 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_MODE_MASK 0x40000000 macro
H A Dsmu_7_1_2_sh_mask.h5547 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_MODE_MASK 0x40000000 macro