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Searched refs:PW0_ENABLE (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-tegra/
H A Ddc.h402 #define PW0_ENABLE BIT(0) macro
/openbmc/u-boot/drivers/video/
H A Dtegra.c158 val = PW0_ENABLE | PW1_ENABLE | PW2_ENABLE; in basic_init()
/openbmc/linux/drivers/gpu/drm/tegra/
H A Ddc.h200 #define PW0_ENABLE (1 << 0) macro
H A Ddc.c2115 value &= ~(PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | in tegra_crtc_atomic_disable()
2253 value |= PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | in tegra_crtc_atomic_enable()
/openbmc/u-boot/drivers/video/tegra124/
H A Dsor.c773 writel(PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | in tegra_dc_sor_attach()