Searched refs:PPC_BIT32 (Results 1 – 11 of 11) sorted by relevance
22 #define TM2_W2_VALID PPC_BIT32(0)23 #define TM2_W2_HW PPC_BIT32(1)34 #define TM2_QW3W2_LP PPC_BIT32(6)35 #define TM2_QW3W2_LE PPC_BIT32(7)61 #define END2_W0_VALID PPC_BIT32(0) /* "v" bit */62 #define END2_W0_ENQUEUE PPC_BIT32(5) /* "q" bit */63 #define END2_W0_UCOND_NOTIFY PPC_BIT32(6) /* "n" bit */64 #define END2_W0_SILENT_ESCALATE PPC_BIT32(7) /* "s" bit */65 #define END2_W0_BACKLOG PPC_BIT32(8) /* "b" bit */66 #define END2_W0_PRECL_ESC_CTL PPC_BIT32(9) /* "p" bit */[all …]
94 #define TM_QW0W2_VU PPC_BIT32(0)96 #define TM_QW1W2_VO PPC_BIT32(0)98 #define TM_QW2W2_VP PPC_BIT32(0)100 #define TM_QW3W2_VT PPC_BIT32(0)101 #define TM_QW3W2_LP PPC_BIT32(6)102 #define TM_QW3W2_LE PPC_BIT32(7)103 #define TM_QW3W2_T PPC_BIT32(31)214 #define END_W0_VALID PPC_BIT32(0) /* "v" bit */215 #define END_W0_ENQUEUE PPC_BIT32(1) /* "q" bit */216 #define END_W0_UCOND_NOTIFY PPC_BIT32(2) /* "n" bit */[all …]
80 #define TM_QW0W2_VU PPC_BIT32(0)82 #define TM_QW1W2_VO PPC_BIT32(0)83 #define TM_QW1W2_HO PPC_BIT32(1) /* P10 XIVE2 */85 #define TM_QW2W2_VP PPC_BIT32(0)86 #define TM_QW2W2_HP PPC_BIT32(1) /* P10 XIVE2 */88 #define TM_QW3W2_VT PPC_BIT32(0)89 #define TM_QW3W2_HT PPC_BIT32(1) /* P10 XIVE2 */90 #define TM_QW3W2_LP PPC_BIT32(6)91 #define TM_QW3W2_LE PPC_BIT32(7)92 #define TM_QW3W2_T PPC_BIT32(31)
18 #define PLPKS_OSSECBOOTAUDIT PPC_BIT32(1) // OS secure boot must be audit/enforce19 #define PLPKS_OSSECBOOTENFORCE PPC_BIT32(2) // OS secure boot must be enforce20 #define PLPKS_PWSET PPC_BIT32(3) // No access without password set21 #define PLPKS_WORLDREADABLE PPC_BIT32(4) // Readable without authentication22 #define PLPKS_IMMUTABLE PPC_BIT32(5) // Once written, object cannot be removed23 #define PLPKS_TRANSIENT PPC_BIT32(6) // Object does not persist through reboot24 #define PLPKS_SIGNEDUPDATE PPC_BIT32(7) // Object can only be modified by signed updates25 #define PLPKS_HVPROVISIONED PPC_BIT32(28) // Hypervisor has provisioned this object
55 #define PPC_BIT32(bit) (1UL << PPC_BITLSHIFT32(bit)) macro56 #define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be))|PPC_BIT32(bs))
20 #define PPC_BIT32(bit) (0x80000000UL >> (bit)) macro37 #define SBE_WARMSTART PPC_BIT32(0)38 #define SBE_HW_TRIGGER PPC_BIT32(2)39 #define SBE_UPDATE_1ST_NIBBLE PPC_BIT32(3)40 #define SBE_IMAGE_SELECT PPC_BIT32(8)41 #define SBE_UPDATE_3RD_NIBBLE PPC_BIT32(11)
13 #define PPC_BIT32(bit) (0x80000000 >> (bit)) macro16 #define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be)) | \17 PPC_BIT32(bs))
16 #define PPC_BIT32(bit) (0x80000000 >> (bit)) macro19 #define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be)) | \20 PPC_BIT32(bs))
44 #define PPC_BIT32(bit) (0x80000000 >> (bit)) macro47 #define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be)) | \48 PPC_BIT32(bs))
643 if (offset & PPC_BIT32(16 + i)) { in pnv_qme_power10_xscom_write()
1456 if (ctx->opcode & PPC_BIT32(25)) { \