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Searched refs:PLL4_P (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-odyssey.dts39 assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL4_P>;
40 assigned-clock-parents = <&rcc PLL4_P>;
H A Dstm32mp15xx-dhcom-som.dtsi464 assigned-clocks = <&rcc CK_MCO2>, <&rcc PLL4_P>;
465 assigned-clock-parents = <&rcc PLL4_P>;
H A Dstm32mp15xc-lxa-tac.dtsi228 assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL4_P>;
229 assigned-clock-parents = <&rcc PLL4_P>;
/openbmc/linux/include/dt-bindings/clock/
H A Dstm32mp13-clks.h34 #define PLL4_P 19 macro
H A Dstm32mp1-clks.h198 #define PLL4_P 189 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dstm32mp1-clks.h198 #define PLL4_P 189 macro
/openbmc/linux/drivers/clk/
H A Dclk-stm32mp1.c1814 COMPOSITE(PLL4_P, "pll4_p", PARENT("pll4"), 0,