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Searched refs:PLL1_BASE_ADDR (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/mx5/
H A Dlowlevel_init.S198 setup_pll PLL1_BASE_ADDR, 864
199 setup_pll_errata PLL1_BASE_ADDR, W_DP_MFN_800_DIT
201 setup_pll PLL1_BASE_ADDR, 800
296 setup_pll PLL1_BASE_ADDR, 800
H A Dclock.c29 [PLL1_CLOCK] = (struct mxc_pll_reg *)PLL1_BASE_ADDR,
/openbmc/u-boot/arch/arm/include/asm/arch-mx5/
H A Dimx-regs.h90 #define PLL1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00080000) macro