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Searched refs:PL011State (Results 1 – 8 of 8) sorted by relevance

/openbmc/qemu/rust/hw/char/pl011/src/
H A Ddevice_class.rs13 use crate::device::{PL011State, PL011_FIFO_DEPTH};
30 vmstate_clock!(clock, PL011State),
55 vmstate_uint32!(flags, PL011State),
58 vmstate_uint32!(control, PL011State),
59 vmstate_uint32!(dmacr, PL011State),
63 vmstate_uint32!(ilpr, PL011State),
64 vmstate_uint32!(ibrd, PL011State),
65 vmstate_uint32!(fbrd, PL011State),
66 vmstate_uint32!(ifl, PL011State),
81 PL011State,
[all …]
H A Dmemory_ops.rs10 use crate::device::PL011State;
28 let mut state = unsafe { NonNull::new_unchecked(opaque.cast::<PL011State>()) }; in pl011_read()
46 let mut state = NonNull::new_unchecked(opaque.cast::<PL011State>()); in pl011_write()
H A Ddevice.rs61 pub struct PL011State { struct
106 impl ObjectImpl for PL011State { argument
130 impl PL011State { implementation
551 let state = NonNull::new_unchecked(opaque.cast::<PL011State>()); in pl011_can_receive()
566 let mut state = NonNull::new_unchecked(opaque.cast::<PL011State>()); in pl011_receive()
585 let mut state = NonNull::new_unchecked(opaque.cast::<PL011State>()); in pl011_event()
600 let dev: *mut DeviceState = qdev_new(PL011State::TYPE_INFO.name); in pl011_create()
619 let mut state = NonNull::new_unchecked(obj.cast::<PL011State>()); in pl011_init()
628 parent_obj: PL011State,
/openbmc/qemu/hw/char/
H A Dpl011.c178 PL011State *s = (PL011State *)opaque; in pl011_fifo_rx_put()
273 PL011State *s = (PL011State *)opaque; in pl011_read()
414 PL011State *s = (PL011State *)opaque; in pl011_write()
487 PL011State *s = (PL011State *)opaque; in pl011_can_receive()
518 PL011State *s = PL011(opaque); in pl011_clock_update()
533 PL011State *s = PL011(opaque); in pl011_clock_needed()
551 PL011State* s = opaque; in pl011_post_load()
615 PL011State *s = PL011(obj); in pl011_init()
632 PL011State *s = PL011(dev); in pl011_realize()
640 PL011State *s = PL011(dev); in pl011_reset()
[all …]
/openbmc/qemu/include/hw/char/
H A Dpl011.h23 OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011)
31 struct PL011State { struct
/openbmc/qemu/include/hw/arm/
H A Dbcm2835_peripherals.h61 PL011State uart0;
H A Dxlnx-versal.h79 PL011State uart[XLNX_VERSAL_NR_UARTS];
/openbmc/qemu/hw/arm/
H A Dmusca.c76 PL011State uart[2];
290 PL011State *uart = opaque; in make_uart()