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/openbmc/linux/Documentation/locking/
H A Dfutex-requeue-pi.rst2 Futex Requeue PI
5 Requeueing of tasks from a non-PI futex to a PI futex requires
7 left without an owner if it has waiters; doing so would break the PI
11 "PI".
51 previously mentioned PI-boosting algorithms.
54 be able to requeue tasks to PI futexes. This support implies that
56 user space already holding the PI futex. The glibc implementation
83 calls for the PI cases. Similar changes are needed for
106 to be requeued to a PI-aware futex. The implementation is the
116 PI futex on behalf of the top waiter. If it can, this waiter is
[all …]
H A Dpi-futex.rst2 Lightweight PI-futexes
7 - in the user-space fastpath a PI-enabled futex involves no kernel work
8 (or any other PI complexity) at all. No registration, no extra kernel
14 - the in-kernel PI implementation is streamlined around the mutex
23 The short reply: user-space PI helps achieving/improving determinism for
25 determinism and well-bound latencies. Even in the worst-case, PI will
78 As mentioned before, the userspace fastpath of PI-enabled pthread
94 own TID into the futex value], and attaches a 'PI state' structure to
114 there is no prior 'registration' of a PI-futex. [which is not quite
117 Also, under this scheme, 'robustness' and 'PI' are two orthogonal
[all …]
H A Drt-mutex-design.rst58 Priority Inheritance (PI)
62 for this document. Here we only discuss PI.
77 the design that is used to implement PI.
79 PI chain
87 PI and spin locks that are used in the PI code, from now on
88 the PI locks will be called a mutex.
128 PI chain
205 Task PI Tree
208 To keep track of the PI chains, each process has its own PI rbtree. This is
224 Depth of the PI Chain
[all …]
H A Drt-mutex.rst2 RT-mutex subsystem with PI support
5 RT-mutexes with priority inheritance are used to support PI-futexes,
8 about PI-futexes.]
/openbmc/linux/arch/m68k/fpsp040/
H A Dstan.S84 |--TERM IN SGL. NOTE THAT PI IS 64-BIT LONG, THUS N*PI/2 IS AT
181 cmpil #0x4004BC7E,%d0 | ...|X| < 15 PI?
187 |--THIS IS THE USUAL CASE, |X| <= 15 PI.
190 fmuld TWOBYPI,%fp1 | ...X*2/PI
322 | ;create 2**16383*PI/2
327 | ;PI/2 at FP_SCR3
340 |--ON ENTRY, FP0 IS X, ON RETURN, FP0 IS X REM PI/2, |X| <= PI/4.
362 |--THAT INT( X * (2/PI) / 2**(L) ) < 2**29.
364 |--CREATE 2**(-L) * (2/PI), SIGN(INARG)*2**(63),
367 movel #0x00003FFE,%d2 | ...BIASED EXPO OF 2/PI
[all …]
H A Dsacos.S48 PI: .long 0x40000000,0xC90FDAA2,0x2168C235,0x00000000 label
57 |--ACOS(X) = PI/2 FOR DENORMALIZED X
H A Dssin.S194 cmpil #0x4004BC7E,%d0 | ...|X| < 15 PI?
199 |--THIS IS THE USUAL CASE, |X| <= 15 PI.
202 fmuld TWOBYPI,%fp1 | ...X*2/PI
205 lea PITBL+0x200,%a1 | ...TABLE OF N*PI/2, N = -32,...,32
459 addil #0x00003FFF,%d2 | ...BIASED EXPO OF 2**L * (PI/2)
548 cmpil #0x4004BC7E,%d0 | ...|X| < 15 PI?
554 |--THIS IS THE USUAL CASE, |X| <= 15 PI.
557 fmuld TWOBYPI,%fp1 | ...X*2/PI
560 lea PITBL+0x200,%a1 | ...TABLE OF N*PI/2, N = -32,...,32
H A Ddo_func.S57 PPIBY2: .long 0x3FFF0000,0xC90FDAA2,0x2168C235 |+PI/2
58 MPIBY2: .long 0xbFFF0000,0xC90FDAA2,0x2168C235 |-PI/2
504 |**Returns +PI/2
510 |**Returns -PI/2
/openbmc/linux/Documentation/devicetree/bindings/powerpc/nintendo/
H A Dgamecube.txt25 1.b) The Processor Interface (PI) node
33 - reg : should contain the PI registers location and length
39 the PI node.
H A Dwii.txt34 1.b) The Processor Interface (PI) node
42 - reg : should contain the PI registers location and length
48 the PI node.
/openbmc/qemu/hw/audio/
H A Dcs4231a.c99 #define PI (1 << 4) macro
493 if ((s->dregs[iaddr] & PI) && !(val & PI)) { in cs_write()
518 s->dregs[Alternate_Feature_Status] &= ~(PI | CI | TI); in cs_write()
599 s->dregs[Alternate_Feature_Status] |= PI; in cs_dma_read()
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-pico-pi.dts15 model = "TechNexion PICO-IMX6 Quad Board and PI baseboard";
H A Dimx6dl-pico-pi.dts15 model = "TechNexion PICO-IMX6 DualLite/Solo Board and PI baseboard";
H A Dimx7d-pico-pi.dts8 model = "TechNexion PICO-IMX7D Board and PI baseboard";
H A Dimx6ul-pico-pi.dts12 model = "TechNexion PICO-IMX6UL and PI baseboard";
/openbmc/u-boot/board/technexion/pico-imx7d/
H A DMAINTAINERS13 TechNexion PICO-PI-IMX7
/openbmc/u-boot/board/technexion/pico-imx6ul/
H A DMAINTAINERS14 TechNexion PICO-PI-IMX6UL
/openbmc/qemu/tests/qemu-iotests/sample_images/
H A Dd2v-zerofilled.vhd.bz2
/openbmc/linux/arch/arm/boot/dts/
H A Dcros-adc-thermistors.dtsi7 * Exynos5800 based Peach PI.
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dahci-common.yaml72 Mask that indicates which ports the HBA supports. Useful if PI is not
96 more than 32 ports due to the CAP.NP fields and PI register size
/openbmc/linux/drivers/media/test-drivers/vidtv/
H A Dvidtv_s302m.c48 #define PI 180 macro
262 pos = (2 * PI * ctx->note_offset * ctx->last_tone) / S302M_SAMPLING_RATE_HZ; in vidtv_s302m_get_sample()
265 return (fixp_sin32(pos % (2 * PI)) >> 16) + 0x8000; in vidtv_s302m_get_sample()
/openbmc/openbmc/poky/meta/recipes-rt/rt-tests/
H A Drt-tests_git.bb18 # rt-tests needs PI mutex support in libc
/openbmc/u-boot/arch/arm/dts/
H A Dimx6ul-pico-pi.dts12 model = "TechNexion PICO-IMX6UL and PI baseboard";
/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Drockchip,rk3399-dmc.txt9 - reg: dynamic ram protocol controller(PCTL) address, PHY Independent(PI) address, phy controller(P…
/openbmc/phosphor-mrw-tools/
H A Dpatchxml.py135 (node.tag is etree.PI)

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