Searched refs:PCLK_DBG_HZ (Results 1 – 2 of 2) sorted by relevance
56 #define PCLK_DBG_HZ (300 * MHz) macro
315 pclk_dbg_div = APLL_HZ / PCLK_DBG_HZ / (clk_core_div + 1) - 1; in rk3328_configure_cpu()