Searched refs:PCI_MSIX_ENTRY_CTRL_MASKBIT (Results 1 – 10 of 10) sorted by relevance
45 desc->pci.msix_ctrl |= PCI_MSIX_ENTRY_CTRL_MASKBIT; in pci_msix_mask()53 desc->pci.msix_ctrl &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; in pci_msix_unmask()
209 bool unmasked = !(ctrl & PCI_MSIX_ENTRY_CTRL_MASKBIT); in pci_write_msg_msix()222 pci_msix_write_vector_ctrl(desc, ctrl | PCI_MSIX_ENTRY_CTRL_MASKBIT); in pci_write_msg_msix()650 u32 ctrl = PCI_MSIX_ENTRY_CTRL_MASKBIT; in msix_mask_all()
61 table_entry[PCI_MSIX_ENTRY_VECTOR_CTRL] &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; in msix_set_message()99 PCI_MSIX_ENTRY_CTRL_MASKBIT; in msix_vector_masked()160 dev->msix_table[offset] |= PCI_MSIX_ENTRY_CTRL_MASKBIT; in msix_set_mask()162 dev->msix_table[offset] &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; in msix_set_mask()287 dev->msix_table[offset] |= PCI_MSIX_ENTRY_CTRL_MASKBIT; in msix_mask_all()
348 (vec_ctrl & PCI_MSIX_ENTRY_CTRL_MASKBIT)) { in xen_pt_msix_update_one()365 vec_ctrl & PCI_MSIX_ENTRY_CTRL_MASKBIT); in xen_pt_msix_update_one()462 !(val & PCI_MSIX_ENTRY_CTRL_MASKBIT)) { in pci_msix_write()
340 control & ~PCI_MSIX_ENTRY_CTRL_MASKBIT); in qvirtqueue_pci_msix_setup()373 control & ~PCI_MSIX_ENTRY_CTRL_MASKBIT); in qvirtio_pci_set_msix_configuration_vector()
352 & PCI_MSIX_ENTRY_CTRL_MASKBIT) != 0; in qpci_msix_masked()
342 #define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001 macro
343 #define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001 macro
603 if (vec_ctrl & PCI_MSIX_ENTRY_CTRL_MASKBIT) { in dw_pcie_ep_raise_msix_irq()
1041 val = mask ? PCI_MSIX_ENTRY_CTRL_MASKBIT : 0; in alx_mask_msix()