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Searched refs:PCIE_LC_LINK_WIDTH_CNTL__LC_UPCFG_TIMER_SEL_MASK (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h7120 #define PCIE_LC_LINK_WIDTH_CNTL__LC_UPCFG_TIMER_SEL_MASK 0x00008000L macro
H A Dbif_4_1_sh_mask.h3271 #define PCIE_LC_LINK_WIDTH_CNTL__LC_UPCFG_TIMER_SEL_MASK 0x8000 macro
H A Dbif_5_0_sh_mask.h11019 #define PCIE_LC_LINK_WIDTH_CNTL__LC_UPCFG_TIMER_SEL_MASK 0x8000 macro
H A Dbif_5_1_sh_mask.h4225 #define PCIE_LC_LINK_WIDTH_CNTL__LC_UPCFG_TIMER_SEL_MASK 0x8000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h42688 #define PCIE_LC_LINK_WIDTH_CNTL__LC_UPCFG_TIMER_SEL_MASK … macro
H A Dnbio_4_3_0_sh_mask.h31580 #define PCIE_LC_LINK_WIDTH_CNTL__LC_UPCFG_TIMER_SEL_MASK … macro
H A Dnbio_2_3_sh_mask.h53831 #define PCIE_LC_LINK_WIDTH_CNTL__LC_UPCFG_TIMER_SEL_MASK … macro
H A Dnbio_6_1_sh_mask.h38048 #define PCIE_LC_LINK_WIDTH_CNTL__LC_UPCFG_TIMER_SEL_MASK … macro