Home
last modified time | relevance | path

Searched refs:MVP_CONTROL1__MVP_RATE_CONTROL__SHIFT (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7812 #define MVP_CONTROL1__MVP_RATE_CONTROL__SHIFT 0x0000000c macro
H A Ddce_8_0_sh_mask.h10264 #define MVP_CONTROL1__MVP_RATE_CONTROL__SHIFT 0xc macro
H A Ddce_10_0_sh_mask.h9962 #define MVP_CONTROL1__MVP_RATE_CONTROL__SHIFT 0xc macro
H A Ddce_11_0_sh_mask.h9656 #define MVP_CONTROL1__MVP_RATE_CONTROL__SHIFT 0xc macro
H A Ddce_11_2_sh_mask.h10934 #define MVP_CONTROL1__MVP_RATE_CONTROL__SHIFT 0xc macro