Searched refs:MISC_CLK_CTRL__ZCLK_SEL_MASK (Results 1 – 12 of 12) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | fiji_baco.c | 94 …{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, MISC_CLK_CTRL__ZCLK_SEL_MASK, MISC_CLK_CTRL__ZCLK_SEL__…
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| H A D | polaris_baco.c | 97 …{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, MISC_CLK_CTRL__ZCLK_SEL_MASK, MISC_CLK_CTRL__ZCLK_SEL__…
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| H A D | ci_baco.c | 112 …{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, MISC_CLK_CTRL__ZCLK_SEL_MASK, MISC_CLK_CTRL__ZCLK_SEL__…
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| H A D | tonga_baco.c | 103 …{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, MISC_CLK_CTRL__ZCLK_SEL_MASK, MISC_CLK_CTRL__ZCLK_SEL__…
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | cik.c | 1816 MISC_CLK_CTRL__ZCLK_SEL_MASK); in cik_program_aspm()
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| H A D | vi.c | 1197 MISC_CLK_CTRL__ZCLK_SEL_MASK | MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL_MASK); in vi_program_aspm()
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| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/smu/ |
| H A D | smu_7_0_0_sh_mask.h | 271 #define MISC_CLK_CTRL__ZCLK_SEL_MASK 0xff00 macro
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| H A D | smu_7_1_1_sh_mask.h | 269 #define MISC_CLK_CTRL__ZCLK_SEL_MASK 0xff00 macro
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| H A D | smu_7_1_0_sh_mask.h | 267 #define MISC_CLK_CTRL__ZCLK_SEL_MASK 0xff00 macro
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| H A D | smu_7_0_1_sh_mask.h | 269 #define MISC_CLK_CTRL__ZCLK_SEL_MASK 0xff00 macro
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| H A D | smu_7_1_3_sh_mask.h | 297 #define MISC_CLK_CTRL__ZCLK_SEL_MASK 0xff00 macro
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| H A D | smu_7_1_2_sh_mask.h | 269 #define MISC_CLK_CTRL__ZCLK_SEL_MASK 0xff00 macro
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