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Searched refs:MISC2_PLLCMD0 (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/char/
H A Descc.c142 #define MISC2_PLLCMD0 0x20 macro
308 s->wregs[W_MISC2] |= MISC2_PLLCMD0; in escc_soft_reset_chn()
338 s->wregs[W_MISC2] |= MISC2_LCL_LOOP | MISC2_PLLCMD0; in escc_hard_reset_chn()