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Searched refs:MIDR_REVISION_MASK (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/tools/perf/arch/arm64/util/
H A Dheader.c16 #define MIDR_REVISION_MASK GENMASK(3, 0) macro
107 char map_id_revision = FIELD_GET(MIDR_REVISION_MASK, map_id); in strcmp_cpuid_str()
110 char id_revision = FIELD_GET(MIDR_REVISION_MASK, id); in strcmp_cpuid_str()
111 u64 id_fields = ~(MIDR_VARIANT_MASK | MIDR_REVISION_MASK); in strcmp_cpuid_str()
/openbmc/linux/tools/arch/arm64/include/asm/
H A Dcputype.h24 #define MIDR_REVISION_MASK 0xf macro
25 #define MIDR_REVISION(midr) ((midr) & MIDR_REVISION_MASK)
241 u32 rv = midr & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); in midr_is_cpu_model_range()
/openbmc/linux/arch/arm64/include/asm/
H A Dcputype.h24 #define MIDR_REVISION_MASK 0xf macro
25 #define MIDR_REVISION(midr) ((midr) & MIDR_REVISION_MASK)
262 u32 rv = midr & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); in midr_is_cpu_model_range()
/openbmc/linux/arch/arm64/kernel/
H A Dcpu_errata.c27 midr &= MIDR_REVISION_MASK | MIDR_VARIANT_MASK; in is_affected_midr_range()
H A Dcpufeature.c1564 MIDR_CPU_VAR_REV(1, MIDR_REVISION_MASK)); in has_no_hw_prefetch()