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Searched refs:MC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_1_sh_mask.h9331 #define MC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
H A Dmmhub_1_0_sh_mask.h9668 #define MC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
H A Dmmhub_9_3_0_sh_mask.h9758 #define MC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
H A Dmmhub_1_8_0_sh_mask.h22359 #define MC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
H A Dmmhub_1_7_sh_mask.h30164 #define MC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22675 #define MC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h23969 #define MC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
H A Dgc_9_1_sh_mask.h23966 #define MC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h26152 #define MC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h29682 #define MC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro