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Searched refs:MCYCLECFG_BIT_VUINH (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h902 #define MCYCLECFG_BIT_VUINH BIT_ULL(58) macro
H A Dcsr.c850 riscv_has_ext(env, RVU)) ? MCYCLECFG_BIT_VUINH : 0; in write_mcyclecfg()
1061 if (!(cfg_val & MCYCLECFG_BIT_VUINH)) { in riscv_pmu_ctr_get_fixed_counters_val()