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Searched refs:MAL0_TXCTP0R (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/ppc/
H A Dppc4xx_devs.c46 MAL0_TXCTP0R = 0x1A0, enumerator
110 if (dcrn >= MAL0_TXCTP0R && dcrn < MAL0_TXCTP0R + mal->txcnum) { in dcr_read_mal()
111 ret = mal->txctpr[dcrn - MAL0_TXCTP0R]; in dcr_read_mal()
170 if (dcrn >= MAL0_TXCTP0R && dcrn < MAL0_TXCTP0R + mal->txcnum) { in dcr_write_mal()
171 mal->txctpr[dcrn - MAL0_TXCTP0R] = val; in dcr_write_mal()
212 ppc4xx_dcr_register(dcr, MAL0_TXCTP0R + i, in ppc4xx_mal_realize()