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Searched refs:KS2_DDR3_SDTIM2_OFFSET (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-keystone/include/mach/
H A Dhardware.h87 #define KS2_DDR3_SDTIM2_OFFSET 0x1C macro
/openbmc/u-boot/arch/arm/mach-keystone/
H A Dddr3.c105 __raw_writel(emif_cfg->sdtim2, base + KS2_DDR3_SDTIM2_OFFSET); in ddr3_init_ddremif()