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Searched refs:JZ4770_CLK_PLL0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/clk/ingenic/
H A Djz4770-cgu.c102 [JZ4770_CLK_PLL0] = {
157 .parents = { JZ4770_CLK_PLL0, },
165 .parents = { JZ4770_CLK_PLL0, },
173 .parents = { JZ4770_CLK_PLL0, },
182 .parents = { JZ4770_CLK_PLL0, },
190 .parents = { JZ4770_CLK_PLL0, },
199 .parents = { JZ4770_CLK_PLL0, },
277 JZ4770_CLK_PLL0, JZ4770_CLK_PLL1 },
284 JZ4770_CLK_PLL0, JZ4770_CLK_PLL1 },
291 JZ4770_CLK_PLL0, JZ4770_CLK_PLL1 },
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/openbmc/linux/include/dt-bindings/clock/
H A Dingenic,jz4770-cgu.h11 #define JZ4770_CLK_PLL0 2 macro
/openbmc/linux/arch/mips/boot/dts/ingenic/
H A Dgcw0.dts460 <&cgu JZ4770_CLK_PLL0>,