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Searched refs:JH7110_SYSCLK_CPU_CORE (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7110-sys.c42 JH71X0__DIV(JH7110_SYSCLK_CPU_CORE, "cpu_core", 7, JH7110_SYSCLK_CPU_ROOT),
43 JH71X0__DIV(JH7110_SYSCLK_CPU_BUS, "cpu_bus", 2, JH7110_SYSCLK_CPU_CORE),
77 JH71X0_GATE(JH7110_SYSCLK_CORE, "core", CLK_IS_CRITICAL, JH7110_SYSCLK_CPU_CORE),
78 JH71X0_GATE(JH7110_SYSCLK_CORE1, "core1", CLK_IS_CRITICAL, JH7110_SYSCLK_CPU_CORE),
79 JH71X0_GATE(JH7110_SYSCLK_CORE2, "core2", CLK_IS_CRITICAL, JH7110_SYSCLK_CPU_CORE),
80 JH71X0_GATE(JH7110_SYSCLK_CORE3, "core3", CLK_IS_CRITICAL, JH7110_SYSCLK_CPU_CORE),
84 JH71X0_GATE(JH7110_SYSCLK_TRACE0, "trace0", 0, JH7110_SYSCLK_CPU_CORE),
85 JH71X0_GATE(JH7110_SYSCLK_TRACE1, "trace1", 0, JH7110_SYSCLK_CPU_CORE),
86 JH71X0_GATE(JH7110_SYSCLK_TRACE2, "trace2", 0, JH7110_SYSCLK_CPU_CORE),
87 JH71X0_GATE(JH7110_SYSCLK_TRACE3, "trace3", 0, JH7110_SYSCLK_CPU_CORE),
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/openbmc/linux/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h18 #define JH7110_SYSCLK_CPU_CORE 1 macro
/openbmc/linux/arch/riscv/boot/dts/starfive/
H A Djh7110.dtsi59 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;
89 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;
119 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;
149 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;