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Searched refs:IRQ_M_SOFT (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h53 #define MIP_MSIP BIT(IRQ_M_SOFT)
78 #define IRQ_M_SOFT 3 macro
/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h78 #define IRQ_M_SOFT 3 macro
417 # define RV_IRQ_SOFT IRQ_M_SOFT
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h699 #define IRQ_M_SOFT 3 macro
718 #define MIP_MSIP (1 << IRQ_M_SOFT)
H A Dcpu.c1261 case IRQ_M_SOFT: in riscv_cpu_set_irq()
/openbmc/qemu/hw/riscv/
H A Dspike.c135 clint_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_SOFT); in create_fdt()
H A Dvirt.c325 clint_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_SOFT); in create_fdt_socket_clint()
362 aclint_mswi_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_M_SOFT); in create_fdt_socket_aclint()
H A Dsifive_u.c205 cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_SOFT); in create_fdt()
/openbmc/qemu/hw/intc/
H A Driscv_aclint.c554 (sswi) ? IRQ_S_SOFT : IRQ_M_SOFT)); in riscv_aclint_swi_create()