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Searched refs:IMX7ULP_CLK_WDG2 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dimx7ulp-clock.h90 #define IMX7ULP_CLK_WDG2 24 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx7ulp-clock.h80 #define IMX7ULP_CLK_WDG2 63 macro
/openbmc/u-boot/arch/arm/dts/
H A Dimx7ulp.dtsi366 clocks = <&clks IMX7ULP_CLK_WDG2>;
367 assigned-clocks = <&clks IMX7ULP_CLK_WDG2>;
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx7ulp.c173 …hws[IMX7ULP_CLK_WDG2] = imx7ulp_clk_hw_composite("wdg2", periph_bus_sels, ARRAY_SIZE(periph_bu… in imx7ulp_clk_pcc2_init()