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Searched refs:IMX5_CLK_PLL1_SW (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dimx5-clock.h120 #define IMX5_CLK_PLL1_SW 112 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx5-clock.h124 #define IMX5_CLK_PLL1_SW 112 macro
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx5.c288 clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", pll_base); in mx50_clocks_init()
373 clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", pll_base); in mx51_clocks_init()
479 clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", pll_base); in mx53_clocks_init()
582 clk[IMX5_CLK_PLL1_SW], in mx53_clocks_init()