Searched refs:IMX5_CLK_ESDHC1_IPG_GATE (Results 1 – 7 of 7) sorted by relevance
52 #define IMX5_CLK_ESDHC1_IPG_GATE 44 macro
56 #define IMX5_CLK_ESDHC1_IPG_GATE 44 macro
70 clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
122 clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
195 clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
243 clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
205 clk[IMX5_CLK_ESDHC1_IPG_GATE] = imx_clk_gate2("esdhc1_ipg_gate", "ipg", MXC_CCM_CCGR3, 0); in mx5_clocks_common_init()