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Searched refs:ICC_SRE_EL1 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/arm64/kvm/hyp/
H A Dvgic-v3-sr.c273 write_gicreg(0, ICC_SRE_EL1); in __vgic_v3_activate_traps()
321 write_gicreg(1, ICC_SRE_EL1); in __vgic_v3_deactivate_traps()
416 u64 val, sre = read_gicreg(ICC_SRE_EL1); in __vgic_v3_get_gic_config()
439 write_gicreg(0, ICC_SRE_EL1); in __vgic_v3_get_gic_config()
442 val = read_gicreg(ICC_SRE_EL1); in __vgic_v3_get_gic_config()
444 write_gicreg(sre, ICC_SRE_EL1); in __vgic_v3_get_gic_config()
/openbmc/u-boot/arch/arm/include/asm/
H A Dgic.h99 #define ICC_SRE_EL1 S3_0_C12_C12_5 macro
/openbmc/qemu/hw/intc/
H A Darm_gicv3_kvm.c70 #define ICC_SRE_EL1 \ macro
461 kvm_gicc_access(s, ICC_SRE_EL1, ncpu, &c->icc_sre_el1, true); in kvm_arm_gicv3_put()
619 kvm_gicc_access(s, ICC_SRE_EL1, ncpu, &c->icc_sre_el1, false); in kvm_arm_gicv3_get()