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Searched refs:HHI_HDMI_PLL_CNTL6 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/meson/
H A Dmeson_vclk.c105 #define HHI_HDMI_PLL_CNTL6 0x334 /* 0xcd offset in data sheet */ macro
251 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55); in meson_venci_cvbs_clock_config()
264 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500); in meson_venci_cvbs_clock_config()
281 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x39272000); in meson_venci_cvbs_clock_config()
507 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55); in meson_hdmi_pll_set_params()
523 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500); in meson_hdmi_pll_set_params()
558 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x39272000); in meson_hdmi_pll_set_params()
563 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x39270000); in meson_hdmi_pll_set_params()
/openbmc/u-boot/drivers/video/meson/
H A Dmeson_vclk.c75 #define HHI_HDMI_PLL_CNTL6 0x334 /* 0xcd offset in data sheet */ macro
218 hhi_write(HHI_HDMI_PLL_CNTL6, 0x00000e55); in meson_venci_cvbs_clock_config()
227 hhi_write(HHI_HDMI_PLL_CNTL6, 0x01a31500); in meson_venci_cvbs_clock_config()
407 hhi_write(HHI_HDMI_PLL_CNTL6, 0x00000e55); in meson_hdmi_pll_set_params()
423 hhi_write(HHI_HDMI_PLL_CNTL6, 0x01a31500); in meson_hdmi_pll_set_params()
/openbmc/linux/drivers/clk/meson/
H A Dgxbb.h102 #define HHI_HDMI_PLL_CNTL6 0x334 /* 0xcd offset in data sheet */ macro
H A Dg12a.h119 #define HHI_HDMI_PLL_CNTL6 0x338 macro
/openbmc/u-boot/arch/arm/include/asm/arch-meson/
H A Dclock-gx.h102 #define HHI_HDMI_PLL_CNTL6 0x334 /* 0xcd offset in data sheet */ macro