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Searched refs:HENVCFG_SSE (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h791 #define HENVCFG_SSE MENVCFG_SSE macro
H A Dcpu_helper.c112 return env->henvcfg & HENVCFG_SSE; in cpu_get_bcfien()
H A Dcsr.c2452 (env->virt_enabled ? get_field(env->henvcfg, HENVCFG_SSE) : true)) { in write_senvcfg()
2501 mask |= HENVCFG_SSE; in write_henvcfg()