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Searched refs:G1_REG_DEC_CTRL2 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/media/platform/verisilicon/
H A Dhantro_g1_vp8_dec.c73 { G1_REG_DEC_CTRL2, 26, 0x3f }, { G1_REG_DEC_CTRL4, 26, 0x3f },
273 reg.base = G1_REG_DEC_CTRL2; in cfg_parts()
488 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL2); in hantro_g1_vp8_dec_run()
H A Dhantro_g1_h264_dec.c65 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL2); in set_params()
H A Dhantro_g1_regs.h84 #define G1_REG_DEC_CTRL2 0x014 macro