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Searched refs:EPLL_CON0_MDIV_SHIFT (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock.c1278 EPLL_CON0_MDIV_MASK << EPLL_CON0_MDIV_SHIFT | in exynos5_set_epll_clk()
1293 epll_con |= exynos5_epll_div[i].m_div << EPLL_CON0_MDIV_SHIFT; in exynos5_set_epll_clk()
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dclock.h1386 #define EPLL_CON0_MDIV_SHIFT 16 macro