Searched refs:DSCCLK1_DTO_PARAM (Results 1 – 4 of 4) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
H A D | dcn31_dccg.h | 62 SR(DSCCLK1_DTO_PARAM),\ 132 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\ 133 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
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H A D | dcn31_dccg.c | 372 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg31_disable_dscclk() 414 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg31_enable_dscclk()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
H A D | dcn314_dccg.h | 69 SR(DSCCLK1_DTO_PARAM),\ 149 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\ 150 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_dccg.h | 283 uint32_t DSCCLK1_DTO_PARAM; member
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