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Searched refs:DSCC4_DSCC_PPS_CONFIG0__BITS_PER_COMPONENT_MASK (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h46608 #define DSCC4_DSCC_PPS_CONFIG0__BITS_PER_COMPONENT_MASK … macro
H A Ddcn_3_0_2_sh_mask.h45838 #define DSCC4_DSCC_PPS_CONFIG0__BITS_PER_COMPONENT_MASK … macro
H A Ddcn_2_0_0_sh_mask.h53175 #define DSCC4_DSCC_PPS_CONFIG0__BITS_PER_COMPONENT_MASK … macro
H A Ddcn_3_0_0_sh_mask.h52469 #define DSCC4_DSCC_PPS_CONFIG0__BITS_PER_COMPONENT_MASK … macro