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Searched refs:DMA0_SR (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/ppc/
H A Dppc440_uc.c517 DMA0_SR = 0x20, enumerator
573 case DMA0_SR: in dcr_read_dma()
670 case DMA0_SR: in dcr_write_dma()
714 ppc_dcr_register(env, dcr_base + DMA0_SR, in ppc4xx_dma_init()
H A Dppc405_uc.c231 DMA0_SR = 0x120, enumerator
294 ppc4xx_dcr_register(dcr, DMA0_SR, dma, &dcr_read_dma, &dcr_write_dma); in ppc405_dma_realize()