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Searched refs:DDR_CFG4_REG (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mt7620/
H A Dmt76xx.h25 #define DDR_CFG4_REG (MT76XX_MEMCTRL_BASE + 0x50) macro
H A Dlowlevel_init.S286 li t0, DDR_CFG4_REG