Home
last modified time | relevance | path

Searched refs:DDRC_TIMING1_TWR_BIT (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/
H A Djz4780_dram.h208 #define DDRC_TIMING1_TWR_BIT 8 macro
209 #define DDRC_TIMING1_TWR_MASK (0x3f << DDRC_TIMING1_TWR_BIT)
210 #define DDRC_TIMING1_TWR_1 (0 << DDRC_TIMING1_TWR_BIT)
211 #define DDRC_TIMING1_TWR_2 (1 << DDRC_TIMING1_TWR_BIT)
212 #define DDRC_TIMING1_TWR_3 (2 << DDRC_TIMING1_TWR_BIT)
213 #define DDRC_TIMING1_TWR_4 (3 << DDRC_TIMING1_TWR_BIT)
214 #define DDRC_TIMING1_TWR_5 (4 << DDRC_TIMING1_TWR_BIT)
215 #define DDRC_TIMING1_TWR_6 (5 << DDRC_TIMING1_TWR_BIT)
/openbmc/u-boot/board/imgtec/ci20/
H A Dci20.c264 (6 << DDRC_TIMING1_TWR_BIT) | (5 << DDRC_TIMING1_TWL_BIT),
308 (6 << DDRC_TIMING1_TWR_BIT) | (5 << DDRC_TIMING1_TWL_BIT),