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Searched refs:DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_CLK (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_enum.h321 DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_CLK = 0x2, enumerator
H A Ddce_11_0_enum.h1090 DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_CLK = 0x2, enumerator
H A Ddce_11_2_enum.h1489 DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_CLK = 0x2, enumerator
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h12043 DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_CLK = 0x00000002, enumerator