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Searched refs:CadenceUARTState (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/hw/char/
H A Dcadence_uart.c146 CadenceUARTState *s = opaque; in fifo_trigger_update()
237 CadenceUARTState *s = opaque; in uart_can_receive()
279 CadenceUARTState *s = opaque; in uart_write_rx_fifo()
304 CadenceUARTState *s = opaque; in cadence_uart_xmit()
363 CadenceUARTState *s = opaque; in uart_receive()
376 CadenceUARTState *s = opaque; in uart_event()
416 CadenceUARTState *s = opaque; in uart_write()
484 CadenceUARTState *s = opaque; in uart_read()
551 CadenceUARTState *s = opaque; in cadence_uart_refclk_update()
576 CadenceUARTState *s = opaque; in cadence_uart_pre_load()
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/openbmc/qemu/include/hw/char/
H A Dcadence_uart.h35 OBJECT_DECLARE_SIMPLE_TYPE(CadenceUARTState, CADENCE_UART)
37 struct CadenceUARTState { struct
/openbmc/qemu/include/hw/arm/
H A Dxlnx-zynqmp.h119 CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS];