Home
last modified time | relevance | path

Searched refs:CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c2910 CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK; /* assuming kernel queue control */ in gfx_v7_0_mqd_init()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3361 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK 0x80000000 macro
H A Dgfx_8_0_sh_mask.h3977 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK 0x80000000 macro
H A Dgfx_8_1_sh_mask.h4499 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK 0x80000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12919 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK … macro
H A Dgc_9_2_1_sh_mask.h14088 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK … macro
H A Dgc_9_1_sh_mask.h14223 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK … macro
H A Dgc_9_4_3_sh_mask.h16453 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK … macro
H A Dgc_9_4_2_sh_mask.h4021 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK … macro
H A Dgc_11_0_0_sh_mask.h17400 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK … macro
H A Dgc_11_0_3_sh_mask.h19639 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK … macro
H A Dgc_10_1_0_sh_mask.h20334 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK … macro
H A Dgc_10_3_0_sh_mask.h18487 #define CP_HQD_PQ_CONTROL__KMD_QUEUE_MASK … macro