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Searched refs:CPM_MSCCDR1 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dpll.c45 #define CPM_MSCCDR1 0xa4 macro
506 writel(msc_cdr, cpm_regs + CPM_MSCCDR1); in jz4780_clk_ungate_mmc()
510 while (readl(cpm_regs + CPM_MSCCDR1) & CPM_MSCCDR_MSC_BUSY) in jz4780_clk_ungate_mmc()