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Searched refs:CPG_PLL2SCR (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/clk/renesas/
H A Dclk-r8a73a4.c31 #define CPG_PLL2SCR 0xf4 macro
117 cr = CPG_PLL2SCR; in r8a73a4_cpg_register_clock()