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Searched refs:CLK_RST_XUSBIO_PLL_CFG0_CLK_ENABLE_SWCTL (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dxusb-padctl.c212 #define CLK_RST_XUSBIO_PLL_CFG0_CLK_ENABLE_SWCTL (1 << 2) macro
371 value &= ~CLK_RST_XUSBIO_PLL_CFG0_CLK_ENABLE_SWCTL; in pcie_phy_enable()