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Searched refs:CLK_PCIEPHY1_DIV (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Drk3568-cru.h45 #define CLK_PCIEPHY1_DIV 32 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3568.c1553 COMPOSITE_NOMUX(CLK_PCIEPHY1_DIV, "clk_pciephy1_div", "ppll_ph0", 0,