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Searched refs:CLK_INFRA_UART1_SEL (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt7986-clk.h92 #define CLK_INFRA_UART1_SEL 2 macro
H A Dmediatek,mt7981-clk.h127 #define CLK_INFRA_UART1_SEL 2 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7986-infracfg.c43 MUX_GATE_CLR_SET_UPD(CLK_INFRA_UART1_SEL, "infra_uart1_sel",
H A Dclk-mt7981-infracfg.c50 MUX_GATE_CLR_SET_UPD(CLK_INFRA_UART1_SEL, "infra_uart1_sel",
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi267 clocks = <&infracfg CLK_INFRA_UART1_SEL>,
270 assigned-clocks = <&infracfg CLK_INFRA_UART1_SEL>;