Searched refs:CLKID_CPU_CLK_DYN1_SEL (Results 1 – 2 of 2) sorted by relevance
194 #define CLKID_CPU_CLK_DYN1_SEL 183 macro
4433 [CLKID_CPU_CLK_DYN1_SEL] = &g12a_cpu_clk_premux1.hw,4658 [CLKID_CPU_CLK_DYN1_SEL] = &g12a_cpu_clk_premux1.hw,4918 [CLKID_CPU_CLK_DYN1_SEL] = &g12a_cpu_clk_premux1.hw,5239 xtal = clk_hw_get_parent_by_index(hws[CLKID_CPU_CLK_DYN1_SEL], 0); in meson_g12a_dvfs_setup_common()5277 xtal = clk_hw_get_parent_by_index(hws[CLKID_CPU_CLK_DYN1_SEL], 0); in meson_g12b_dvfs_setup()