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Searched refs:CCM_PLL5_CTRL_P (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun4i.h231 #define CCM_PLL5_CTRL_P(n) (((n) & 0x3) << 16) macro
233 #define CCM_PLL5_CTRL_P_MASK CCM_PLL5_CTRL_P(0x3)
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun4i.c253 reg_val |= CCM_PLL5_CTRL_P(1); in mctl_setup_dram_clock()