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Searched refs:AR933X_PLL_CPU_CONFIG_REG (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dlowlevel_init.S186 sw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
189 lw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
210 sw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
215 lw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
H A Dclk.c39 val = readl(regs + AR933X_PLL_CPU_CONFIG_REG); in get_clocks()
/openbmc/linux/arch/mips/ath79/
H A Dclock.c178 cpu_config = __raw_readl(pll_base + AR933X_PLL_CPU_CONFIG_REG); in ar933x_clocks_init()
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h330 #define AR933X_PLL_CPU_CONFIG_REG 0x00 macro
/openbmc/linux/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h295 #define AR933X_PLL_CPU_CONFIG_REG 0x00 macro