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Searched refs:APBC_PWM1 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/clk/mmp/
H A Dclk-of-pxa168.c26 #define APBC_PWM1 0x10 macro
167 …{0, "pwm1_mux", pwm_parent_names, ARRAY_SIZE(pwm_parent_names), CLK_SET_RATE_PARENT, APBC_PWM1, 4,…
188 …{PXA168_CLK_PWM1, "pwm1_clk", "pwm1_mux", CLK_SET_RATE_PARENT, APBC_PWM1, 0x3, 0x3, 0x0, 0, &pwm1_…
H A Dclk-of-pxa910.c29 #define APBC_PWM1 0x10 macro
146 …{PXA910_CLK_PWM1, "pwm1_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM1, 0x3, 0x3, 0x0, 0, &reset_…
H A Dclk-of-mmp2.c40 #define APBC_PWM1 0x40 macro
261 …{MMP2_CLK_PWM1, "pwm1_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM1, 0x7, 0x3, 0x0, 0, &reset_lo…