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/openbmc/u-boot/drivers/usb/gadget/
H A Dgadget_chips.h18 #define gadget_is_net2280(g) (!strcmp("net2280", (g)->name)) argument
30 #define gadget_is_dummy(g) (!strcmp("dummy_udc", (g)->name)) argument
36 #define gadget_is_pxa(g) (!strcmp("pxa2xx_udc", (g)->name)) argument
42 #define gadget_is_goku(g) (!strcmp("goku_udc", (g)->name)) argument
49 #define gadget_is_sh(g) (!strcmp("sh_udc", (g)->name)) argument
56 #define gadget_is_sa1100(g) (!strcmp("sa1100_udc", (g)->name)) argument
63 #define gadget_is_mq11xx(g) (!strcmp("mq11xx_udc", (g)->name)) argument
69 #define gadget_is_omap(g) (!strcmp("omap_udc", (g)->name)) argument
76 #define gadget_is_n9604(g) (!strcmp("n9604_udc", (g)->name)) argument
95 #define gadget_is_at91(g) (!strcmp("at91_udc", (g)->name)) argument
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/openbmc/qemu/hw/display/
H A Dvirtio-gpu-base.c28 g->enable = 0; in virtio_gpu_base_reset()
32 g->scanout[i].width = 0; in virtio_gpu_base_reset()
34 g->scanout[i].x = 0; in virtio_gpu_base_reset()
35 g->scanout[i].y = 0; in virtio_gpu_base_reset()
36 g->scanout[i].ds = NULL; in virtio_gpu_base_reset()
123 vgc->gl_flushed(g); in virtio_gpu_gl_flushed()
192 g->virtio_config.num_scanouts = cpu_to_le32(g->conf.max_outputs); in virtio_gpu_base_device_realize()
207 g->req_state[0].width = g->conf.xres; in virtio_gpu_base_device_realize()
208 g->req_state[0].height = g->conf.yres; in virtio_gpu_base_device_realize()
212 g->scanout[i].con = in virtio_gpu_base_device_realize()
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H A Dvirtio-gpu-virgl.c168 g->parent_obj.enable = 1; in virgl_cmd_set_scanout()
229 g->stats.req_3d++; in virgl_cmd_submit_3d()
511 VirtIOGPU *g = opaque; in virgl_write_fence() local
526 g->inflight--; in virgl_write_fence()
537 VirtIOGPU *g = opaque; in virgl_create_context() local
550 VirtIOGPU *g = opaque; in virgl_destroy_context() local
559 VirtIOGPU *g = opaque; in virgl_make_context_current() local
576 VirtIOGPU *g = opaque; in virtio_gpu_print_stats() local
578 if (g->stats.requests) { in virtio_gpu_print_stats()
596 VirtIOGPU *g = opaque; in virtio_gpu_fence_poll() local
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H A Dvhost-user-gpu.c235 g->parent_obj.enable = 1; in vhost_user_gpu_handle_display()
263 g->parent_obj.enable = 1; in vhost_user_gpu_handle_display()
311 g->backend_blocked = true; in vhost_user_gpu_handle_display()
356 VhostUserGPU *g = opaque; in vhost_user_gpu_chr_read() local
420 if (g->backend_blocked) { in vhost_user_gpu_gl_flushed()
421 vhost_user_gpu_unblock(g); in vhost_user_gpu_gl_flushed()
422 g->backend_blocked = false; in vhost_user_gpu_gl_flushed()
453 g->vhost_gpu_fd = sv[0]; in vhost_user_gpu_do_set_socket()
533 g->vhost_gpu_fd = -1; in vhost_user_gpu_set_status()
639 g->vhost_gpu_fd = -1; in vhost_user_gpu_device_realize()
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H A Dvirtio-gpu.c286 if (res->hostmem + g->hostmem < g->conf_max_hostmem) { in virtio_gpu_resource_create_2d()
1055 if (g->stats.max_inflight < g->inflight) { in virtio_gpu_process_cmdq()
1056 g->stats.max_inflight = g->inflight; in virtio_gpu_process_cmdq()
1076 g->inflight--; in virtio_gpu_process_fenceq()
1117 vgc->handle_ctrl(VIRTIO_DEVICE(g), g->ctrl_vq); in virtio_gpu_ctrl_bh()
1155 virtio_gpu_handle_cursor(&g->parent_obj.parent_obj, g->cursor_vq); in virtio_gpu_cursor_bh()
1280 g->hostmem = 0; in virtio_gpu_load()
1497 g->ctrl_bh = virtio_bh_new_guarded(qdev, virtio_gpu_ctrl_bh, g); in virtio_gpu_device_realize()
1498 g->cursor_bh = virtio_bh_new_guarded(qdev, virtio_gpu_cursor_bh, g); in virtio_gpu_device_realize()
1499 g->reset_bh = qemu_bh_new(virtio_gpu_reset_bh, g); in virtio_gpu_device_realize()
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H A Dvirtio-vga.c15 if (g->enable) { in virtio_vga_base_invalidate_display()
16 g->hw_ops->invalidate(g); in virtio_vga_base_invalidate_display()
27 if (g->enable) { in virtio_vga_base_update_display()
28 g->hw_ops->gfx_update(g); in virtio_vga_base_update_display()
39 if (g->enable) { in virtio_vga_base_text_update()
41 g->hw_ops->text_update(g, chardata); in virtio_vga_base_text_update()
55 if (g->hw_ops->ui_info) { in virtio_vga_base_ui_info()
56 g->hw_ops->ui_info(g, idx, info); in virtio_vga_base_ui_info()
66 g->hw_ops->gl_block(g, block); in virtio_vga_base_gl_block()
75 return g->hw_ops->get_flags(g); in virtio_vga_base_get_flags()
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H A Dvirtio-gpu-rutabaga.c69 VirtIOGPU *g = VIRTIO_GPU(b); in virtio_gpu_rutabaga_gl_flushed() local
70 virtio_gpu_process_cmdq(g); in virtio_gpu_rutabaga_gl_flushed()
176 rutabaga_cmd_resource_unref(VirtIOGPU *g, in rutabaga_cmd_resource_unref() argument
202 rutabaga_cmd_context_create(VirtIOGPU *g, in rutabaga_cmd_context_create() argument
340 rutabaga_cmd_submit_3d(VirtIOGPU *g, in rutabaga_cmd_submit_3d() argument
500 virtio_gpu_cleanup_mapping(g, res); in rutabaga_cmd_detach_backing()
776 rutabaga_cmd_submit_3d(g, cmd); in virtio_gpu_rutabaga_process_cmd()
818 virtio_gpu_get_edid(g, cmd); in virtio_gpu_rutabaga_process_cmd()
988 builder.user_data = (uint64_t)g; in virtio_gpu_rutabaga_init()
1052 VirtIOGPU *g = VIRTIO_GPU(vdev); in virtio_gpu_rutabaga_handle_ctrl() local
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/openbmc/linux/drivers/gpio/
H A Dgpio-ftgpio010.c237 struct ftgpio_gpio *g; in ftgpio_gpio_probe() local
242 g = devm_kzalloc(dev, sizeof(*g), GFP_KERNEL); in ftgpio_gpio_probe()
243 if (!g) in ftgpio_gpio_probe()
246 g->dev = dev; in ftgpio_gpio_probe()
249 if (IS_ERR(g->base)) in ftgpio_gpio_probe()
257 if (!IS_ERR(g->clk)) { in ftgpio_gpio_probe()
281 g->gc.base = -1; in ftgpio_gpio_probe()
282 g->gc.parent = dev; in ftgpio_gpio_probe()
287 if (!IS_ERR(g->clk)) in ftgpio_gpio_probe()
290 girq = &g->gc.irq; in ftgpio_gpio_probe()
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H A Dgpio-ixp4xx.c202 struct ixp4xx_gpio *g; in ixp4xx_gpio_probe() local
207 g = devm_kzalloc(dev, sizeof(*g), GFP_KERNEL); in ixp4xx_gpio_probe()
208 if (!g) in ixp4xx_gpio_probe()
210 g->dev = dev; in ixp4xx_gpio_probe()
213 if (IS_ERR(g->base)) in ixp4xx_gpio_probe()
214 return PTR_ERR(g->base); in ixp4xx_gpio_probe()
263 g->gc.ngpio = 16; in ixp4xx_gpio_probe()
270 g->gc.base = 0; in ixp4xx_gpio_probe()
274 girq = &g->gc.irq; in ixp4xx_gpio_probe()
276 girq->fwnode = g->fwnode; in ixp4xx_gpio_probe()
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H A Dgpio-davinci.c79 return g; in irq2regs()
97 g = d->regs[bank]; in __davinci_direction()
102 writel_relaxed(mask, value ? &g->set_data : &g->clr_data); in __davinci_direction()
136 g = d->regs[bank]; in davinci_gpio_get()
151 g = d->regs[bank]; in davinci_gpio_set()
154 value ? &g->set_data : &g->clr_data); in davinci_gpio_set()
343 g = irqdata->regs; in gpio_irq_handler()
425 ? &g->set_falling : &g->clr_falling); in gpio_irq_type_unbanked()
427 ? &g->set_rising : &g->clr_rising); in gpio_irq_type_unbanked()
565 g = chips->regs[0]; in davinci_gpio_irq_setup()
[all …]
/openbmc/linux/tools/perf/bench/
H A Dnuma.c507 return alloc_data(bytes, MAP_SHARED, 1, g->p.init_cpu0, g->p.thp, g->p.init_random); in zalloc_shared_data()
515 return alloc_data(bytes, MAP_SHARED, 0, g->p.init_cpu0, g->p.thp, g->p.init_random); in setup_shared_data()
1202 if (g->nr_tasks_started == g->p.nr_tasks) in worker_thread()
1482 if (!g->p.mb_global_str && !g->p.mb_proc_str && !g->p.mb_thread_str) in init()
1486 g->p.mb_global = atof(g->p.mb_global_str); in init()
1491 g->p.mb_proc = atof(g->p.mb_proc_str); in init()
1502 g->p.mb_thread = atof(g->p.mb_thread_str); in init()
1509 g->p.nr_tasks = g->p.nr_proc*g->p.nr_threads; in init()
1539 free_data(g->data, g->p.bytes_global); in deinit()
1544 free_data(g, sizeof(*g)); in deinit()
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/openbmc/qemu/include/ui/
H A Dpixel_ops.h1 static inline unsigned int rgb_to_pixel8(unsigned int r, unsigned int g, in rgb_to_pixel8() argument
4 return ((r >> 5) << 5) | ((g >> 5) << 2) | (b >> 6); in rgb_to_pixel8()
7 static inline unsigned int rgb_to_pixel15(unsigned int r, unsigned int g, in rgb_to_pixel15() argument
10 return ((r >> 3) << 10) | ((g >> 3) << 5) | (b >> 3); in rgb_to_pixel15()
16 return ((b >> 3) << 10) | ((g >> 3) << 5) | (r >> 3); in rgb_to_pixel15bgr()
22 return ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3); in rgb_to_pixel16()
28 return ((b >> 3) << 11) | ((g >> 2) << 5) | (r >> 3); in rgb_to_pixel16bgr()
34 return (r << 16) | (g << 8) | b; in rgb_to_pixel24()
40 return (b << 16) | (g << 8) | r; in rgb_to_pixel24bgr()
46 return (r << 16) | (g << 8) | b; in rgb_to_pixel32()
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/openbmc/linux/drivers/pinctrl/qcom/
H A Dpinctrl-msm.c89 return readl(pctrl->regs[g->tile] + g->name##_reg); \
94 writel(val, pctrl->regs[g->tile] + g->name##_reg); \
106 u32 val = g->intr_ack_high ? BIT(g->intr_status_bit) : 0; in MSM_ACCESSOR()
197 mask = GENMASK(g->mux_bit + order_base_2(g->nfuncs) - 1, g->mux_bit); in msm_pinmux_set_mux()
237 msm_writel_io(io_val | BIT(g->out_bit), pctrl, g); in msm_pinmux_set_mux()
240 msm_writel_io(io_val & ~BIT(g->out_bit), pctrl, g); in msm_pinmux_set_mux()
825 val = msm_readl_io(pctrl, g) & BIT(g->in_bit); in msm_gpio_update_dual_edge_pos()
831 val2 = msm_readl_io(pctrl, g) & BIT(g->in_bit); in msm_gpio_update_dual_edge_pos()
965 val = msm_readl_io(pctrl, g) & BIT(g->in_bit); in msm_gpio_update_dual_edge_parent()
978 val = msm_readl_io(pctrl, g) & BIT(g->in_bit); in msm_gpio_update_dual_edge_parent()
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/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Duser-func.rst34 vidioc-g-audio
36 vidioc-g-crop
37 vidioc-g-ctrl
39 vidioc-g-edid
42 vidioc-g-fbuf
43 vidioc-g-fmt
45 vidioc-g-input
48 vidioc-g-output
49 vidioc-g-parm
53 vidioc-g-std
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H A Dpixfmt-rgb.rst130 - g\ :sub:`2`
131 - g\ :sub:`1`
132 - g\ :sub:`0`
141 - g\ :sub:`3`
142 - g\ :sub:`2`
143 - g\ :sub:`1`
144 - g\ :sub:`0`
164 - g\ :sub:`3`
165 - g\ :sub:`2`
166 - g\ :sub:`1`
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H A Dsubdev-formats.rst294 - g\ :sub:`3`
295 - g\ :sub:`2`
296 - g\ :sub:`1`
297 - g\ :sub:`0`
366 - g\ :sub:`3`
367 - g\ :sub:`2`
368 - g\ :sub:`1`
369 - g\ :sub:`0`
403 - g\ :sub:`3`
404 - g\ :sub:`2`
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/openbmc/qemu/tests/qemu-iotests/sample_images/
H A Diotest-dirtylog-10G-4M.vhdx.bz21vhdxfileQ�E�M�U� �v�1�.�6�.�5�
H A Diotest-dynamic-1G.vhdx.bz21vhdxfileM�i�c�r�o�s�o�f�t� �W�i�n�d�o�w�s� �6�.� ...
/openbmc/qemu/contrib/vhost-user-gpu/
H A Dvirgl.c38 virgl_cmd_context_create(VuGpu *g, in virgl_cmd_context_create() argument
170 virgl_cmd_get_capset(VuGpu *g, in virgl_cmd_get_capset() argument
196 virgl_cmd_submit_3d(VuGpu *g, in virgl_cmd_submit_3d() argument
457 vg_wait_ok(g); in virgl_cmd_resource_flush()
544 vg_get_edid(g, cmd); in vg_virgl_process_cmd()
576 VuGpu *g = opaque; in virgl_write_fence() local
591 g->inflight--; in virgl_write_fence()
600 VuGpu *g = opaque; in virgl_get_drm_fd() local
602 return g->drm_rnode_fd; in virgl_get_drm_fd()
624 vg_virgl_init(VuGpu *g) in vg_virgl_init() argument
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H A Dvhost-user-gpu.c115 g->sock_fd = -1; in vg_sock_fd_close()
122 VuGpu *g = user_data; in source_wait_cb() local
129 g->wait_in = 0; in source_wait_cb()
136 vg_wait_ok(VuGpu *g) in vg_wait_ok() argument
139 g->wait_in = g_unix_fd_add(g->sock_fd, G_IO_IN | G_IO_HUP, in vg_wait_ok()
1095 g->wait_in = 0; in protocol_features_cb()
1118 g->wait_in = g_unix_fd_add(g->sock_fd, G_IO_IN | G_IO_HUP, in set_gpu_protocol_features()
1170 g->virgl = virgl; in vg_set_features()
1216 vg_destroy(VuGpu *g) in vg_destroy() argument
1282 vugbm_device_init(&g.gdev, g.drm_rnode_fd); in main()
[all …]
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra.c272 val = pmx_readl(pmx, g->mux_bank, g->mux_reg); in tegra_pinctrl_set_mux()
275 pmx_writel(pmx, val, g->mux_bank, g->mux_reg); in tegra_pinctrl_set_mux()
376 *reg = g->tri_reg; in tegra_pinconf_reg()
377 *bit = g->tri_bit; in tegra_pinconf_reg()
382 *reg = g->mux_reg; in tegra_pinconf_reg()
388 *reg = g->mux_reg; in tegra_pinconf_reg()
394 *reg = g->mux_reg; in tegra_pinconf_reg()
400 *reg = g->mux_reg; in tegra_pinconf_reg()
406 *reg = g->mux_reg; in tegra_pinconf_reg()
418 *bit = g->hsm_bit; in tegra_pinconf_reg()
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/openbmc/linux/drivers/usb/gadget/udc/
H A Dtrace.h22 TP_ARGS(g, ret),
86 TP_ARGS(g, ret)
91 TP_ARGS(g, ret)
96 TP_ARGS(g, ret)
101 TP_ARGS(g, ret)
106 TP_ARGS(g, ret)
111 TP_ARGS(g, ret)
116 TP_ARGS(g, ret)
121 TP_ARGS(g, ret)
126 TP_ARGS(g, ret)
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/openbmc/linux/crypto/
H A Dsm3.c43 h += GG ## i(e, f, g) + ss1 + (w1); \
49 #define R1(a, b, c, d, e, f, g, h, t, w1, w2) \ argument
50 R(1, a, b, c, d, e, f, g, h, t, w1, w2)
51 #define R2(a, b, c, d, e, f, g, h, t, w1, w2) \ argument
52 R(2, a, b, c, d, e, f, g, h, t, w1, w2)
74 u32 a, b, c, d, e, f, g, h, ss1, ss2; in sm3_transform() local
82 g = sctx->state[6]; in sm3_transform()
85 R1(a, b, c, d, e, f, g, h, K[0], I(0), I(4)); in sm3_transform()
86 R1(d, a, b, c, h, e, f, g, K[1], I(1), I(5)); in sm3_transform()
87 R1(c, d, a, b, g, h, e, f, K[2], I(2), I(6)); in sm3_transform()
[all …]
/openbmc/qemu/tests/avocado/
H A Dreverse_debugging.py63 def get_reg_le(g, reg): argument
71 def get_reg_be(g, reg): argument
82 def get_pc(self, g): argument
86 pc = self.get_pc(g)
91 def gdb_step(g): argument
95 def gdb_bstep(g): argument
133 g.connect()
149 self.gdb_step(g)
162 self.gdb_step(g)
178 g.cmd(b'c')
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/openbmc/linux/drivers/staging/most/dim2/
H A Dhal.c121 g.dbr_map[i] |= mask; in alloc_dbr()
359 writel(readl(&g.dim2->ACMR0) | bit_mask(ch_addr), &g.dim2->ACMR0); in dim2_configure_channel()
365 writel(readl(&g.dim2->ACMR0) & ~bit_mask(ch_addr), &g.dim2->ACMR0); in dim2_clear_channel()
389 g.atx_dbr.wpc = g.atx_dbr.rpc; in dbrcnt_init()
395 g.atx_dbr.sz_queue[norm_pc(g.atx_dbr.wpc)] = buf_sz; in dbrcnt_enq()
396 g.atx_dbr.wpc++; in dbrcnt_enq()
543 &g.dim2->MLBC0); in dim2_initialize()
729 g.fcnt = fcnt; in dim_startup()
730 g.dbr_map[0] = 0; in dim_startup()
731 g.dbr_map[1] = 0; in dim_startup()
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