Searched hist:fe1c3cd3 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/board/theobroma-systems/lion_rk3368/ |
| H A D | fit_spl_atf.its | fe1c3cd3 Fri Jul 28 11:00:27 CDT 2017 Philipp Tomsich <philipp.tomsich@theobroma-systems.com> rockchip: lion-rk3368: defconfig: enable DM timer for all stages
There is no reasonably robust way (this will be needed so early that
diagnostics will be limited) to specify the base-address of the secure
timer through the DTS for TPL and SPL. In order to allow us a cleaner
way to structure our SPL and TPL stage, we now move to a DM timer
driver.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
| /openbmc/u-boot/configs/ |
| H A D | lion-rk3368_defconfig | fe1c3cd3 Fri Jul 28 11:00:27 CDT 2017 Philipp Tomsich <philipp.tomsich@theobroma-systems.com> rockchip: lion-rk3368: defconfig: enable DM timer for all stages
There is no reasonably robust way (this will be needed so early that
diagnostics will be limited) to specify the base-address of the secure
timer through the DTS for TPL and SPL. In order to allow us a cleaner
way to structure our SPL and TPL stage, we now move to a DM timer
driver.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|